Multilevel Logic and the Boolean Network Model

Из курса от партнера University of Illinois at Urbana-Champaign
VLSI CAD Part I: Logic
108 оценок
University of Illinois at Urbana-Champaign
108 оценок
Из урока
2-Level Logic Synthesis, and Multi-Level Logic Synthesis via the Algebraic Model
In Week 3, we will move from "representing" things to "synthesizing" things. In this case, synthesis means "optimization", or maybe the word "minimization" is more familiar from hand work with Kmaps or Boolean algebra.

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  • Rob A. Rutenbar
    Rob A. Rutenbar
    Adjunct Professor
    Department of Computer Science

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